Architecture
This construct is used to define the functionality of the model. In this section, the relations between the ports defined in entity.
Syntax:
architecture architecture_name of entity_name is
declarations (signal declarations, component declarations, etc...)
begin
architecture_body
end architecture_names ;
Example:
architecture Behavioral of AND_GATE is
signal C : std_logic;
begin
C <= A AND B;
end Behavioral;
Each architecture must be declared in an entity. An entity can contain more than one architecture. All expressions defined in an architecture are processed in parallel.
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